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lf to 2.5 ghz trupwr ? detector data sheet ad8361 rev. f document feedback information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent ri ghts of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062 - 9106, u.s.a. tel: 781.329.4700 ? 1999 C 2015 analog devices, inc. all rights reserved. technical support www.analog.com features calibrated rms response excellent temperature stability up to 30 db input range at 2.5 ghz 700 mv rms, 10 dbm, re 50 maximum input 0.25 db linear response up to 2.5 ghz single - supply operation: 2.7 v to 5.5 v low power: 3.3 mw at 3 v supply rapid power - down to less than 1 a applications measurement of cdma, w - cdma, qam, other complex modulation waveforms rf transmitter or receiver power measurement general description t he ad8361 is a mean - responding power detector for use in high frequency receiver and transmitter signal chains, up to 2.5 ghz. it is very easy to apply. it requires a single supply only between 2.7 v and 5.5 v, a power supply decoupling capacitor , and an input coupling capacitor in most applications. the output is a linear - responding dc voltage with a conversion gain of 7.5 v/v rms. an external filter capacitor can be added to increase the averaging time constant. f igure 1 . output in the three reference modes, supply 3 v, frequency 1.9 ghz (6- lead sot - 23 package ground reference mode only) functional block dia gram s figure 2. 8 - lead msop figure 3. 6 - lead sot - 23 the ad8361 is intended for true power measurement of simple and complex waveforms. the device is particularly useful for measuring high crest - factor (high peak - to - rms ratio) signals, such as cdma and w - cdma. the ad8361 has three operating modes to accommodate a variety of analog - to - digital converter requirements: 1. ground reference mode, in which the origin is zero. 2. internal reference mode, which offsets the output 350 mv above ground. 3. supply reference mode, which offsets the output to v s /7.5. the ad8361 is specified for operation from ?40c to +85c and is available in 8 - lead msop and 6 - lead sot - 23 packages. it is fabricated on a proprietary high f t silicon bipolar process. rfin (v rms) 3.0 1.6 0 0.5 0.1 0.2 0.3 0.4 2.6 2.2 2.0 1.8 2.8 2.4 v rms (volts) 1.4 1.2 1.0 0.6 0.8 0.4 0.2 0.0 supply reference mode internal reference mode ground reference mode 01088-c-001 rfin iref pwdn vpos fltr sref vrms comm band-gap reference error amp ad8361 internal filter add offset trans- conductance cells i i 7.5 buffer 2 2 01088-c-002 rfin iref pwdn vpos fltr vrms comm band-gap reference error amp ad8361 internal filter trans- conductance cells i i 7.5 buffer 2 2 01088-c-003
ad8361 data sheet rev. f | page 2 of 22 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 general descript ion ......................................................................... 1 functional block diagrams ............................................................. 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 absolute maximum ratings ............................................................ 4 esd caution .................................................................................. 4 pin configuration and function descriptions ............................. 5 typical performance characteristics ..............................................6 circuit description ......................................................................... 11 application information ................................................................ 12 output reference temperature drift compensation ........... 16 evaluation board ............................................................................ 19 characterization setups ............................................................. 21 outline dimensions ....................................................................... 22 ordering guide .......................................................................... 22 revision history 7/15 rev. e to rev. f change to ordering guide ............................................................ 22 5/15 rev . d to rev. e deleted dynamic range extension for the ad8361 section, figure 60 , renumbered sequentially ........................................... 19 deleted figure 61 , figure 62 , figure 63 , and figure 64 ............ 20 3 / 14 rev. c to rev. d changes to ordering guide .......................................................... 24 updated outline dimensions ....................................................... 24 8/04 rev. b to rev. c changed trimpots to tri mmable potentiometers ......... universal changes to specifications ................................................................. 3 changed using the ad8361 s ection title to applications ....... 12 changes to figure 43 ...................................................................... 14 changes to ordering guide .......................................................... 24 updated outline dimensions ....................................................... 24
data sheet ad8361 rev. f | page 3 of 22 specifications t a = 25c, v s = 3 v, f rf = 900 mhz, ground reference output mode, unless otherwise noted. table 1. parameter condition min typ max unit signal input interface (input rfin) frequency range 1 2.5 ghz linear response upper limit v s = 3 v 390 mv rms equivalent dbm, re 50 4.9 dbm v s = 5 v 660 mv rms equivalent dbm, re 50 9.4 dbm input impedance 2 225||1 ||pf rms conversion (input rfin to output v rms) conversion gain 7.5 v/v rms f rf = 100 mhz, v s = 5 v 6.5 8.5 v/v rms dynamic range error referred to best fit line 3 0.25 db error 4 cw input, ?40c < t a < +85c 14 db 1 db error cw input, ?40c < t a < +85c 23 db 2 db error cw input, ?40c < t a < +85c 26 db cw input, v s = 5 v, ?40c < t a < +85c 30 db intercept-induced dynamic internal reference mode 1 db range reduction 5, 6 supply reference mode, v s = 3.0 v 1 db supply reference mode, v s = 5.0 v 1.5 db deviation from cw response 5.5 db peak-to-average ratio (is95 reverse link) 0.2 db 12 db peak-to-average ratio (w-cdma 4 channels) 1.0 db 18 db peak-to-average ratio (w-cdma 15 channels) 1.2 db output intercept 5 inferred from best fit line 3 ground reference mode (grm) 0 v at sref, v s at iref 0 v f rf = 100 mhz, v s = 5 v ?50 +150 mv internal reference mode (irm) 0 v at sref, iref open 350 mv f rf = 100 mhz, v s = 5 v 300 500 mv supply reference mode (srm) 3 v at iref, 3 v at sref 400 mv v s at iref, v s at sref v s /7.5 v f rf = 100 mhz, v s = 5 v 590 750 mv power-down interface pwdn hi threshold 2.7 v s 5.5 v, ?40c < t a < +85c v s ? 0.5 v pwdn lo threshold 2.7 v s 5.5 v, ?40c < t a < +85c 0.1 v power-up response time 2 pf at fltr pin, 224 mv rms at rfin 5 s 100 nf at fltr pin, 224 mv rms at rfin 320 s pwdn bias current <1 a power supplies operating range ?40c < t a < +85c 2.7 5.5 v quiescent current 0 mv rms at rfin, pwdn input lo 7 1.1 ma power-down current grm or irm, 0 mv rms at rfin, pwdn input hi <1 a srm, 0 mv rms at rfin, pwdn input hi 10 v s a 1 operation at arbitrarily low frequencies is possible; see application information section. 2 figure 17 and figure 47 show imped ance versus frequency for the msop and sot-23, respectively. 3 calculated using linear regression. 4 compensated for output reference temperature drift; see application information section. 5 sot-23-6l operates in ground reference mode only. 6 the available output swing, and hence the dynamic range, is al tered by both supply voltage an d reference mode; see figure 39 a nd figure 40. 7 supply current is input leve l dependent; see figure 16.
ad8361 data sheet rev. f | page 4 of 22 absolute maximum rat ings table 2 . parameter rating supply voltage v s 5.5 v sref, pwdn 0 v, v s iref v s ? 0.3 v, v s rfin 1 v rms equivalent power, re 50 13 dbm internal power dissipation 1 200 mw 6 - lead sot -23 170 mw 8 - lead msop 200 mw maximum junction temperature 125c operating temperature range ?40c to +85c storage temperature range ?65c to +150c lead temperature range (soldering 60 sec) 300c 1 specification is for the device in free air. 6 - lead sot - 23: ja = 230c/w; jc = 92c/w. 8 - lead msop: ja = 200c/w; jc = 44c/w. stresses at or above those listed under absolute maximum ratings may cause permanent damage to the product. this is a stress rating only; functional operation of the product at these or any other con ditions above those indicated in the operational section of this specification is not implied. operation beyond the maximum operating conditions for extended periods may affect product reliability. esd caution
data sheet ad8361 rev. f | page 5 of 22 pin configuration an d function descripti ons figure 4. 8 - lead msop figure 5. 6 - lead sot - 23 table 3 . pin function descriptions pin no. msop pin no. sot 23 mnemonic description 1 6 vpos supply voltage pin. operational range 2.7 v to 5.5 v. 2 n/a iref output reference control pin. internal reference mode enabled when pin is left open ; o therwise, this pin should be tied to vpos. do not ground this pin. 3 5 rfin signal input pin. must be driven from an ac - coupled source. the low frequency real input impedance is 225 . 4 4 pwdn power - down pin. for the device to operate as a detector, it needs a logical low input (less than 100 mv). when a logic high (greater than v s ? 0.5 v) is applied, the device is turned off and the supply current goes to nearly zero (ground and internal reference mode less than 1 a, supply reference mode v s divided by 100 k). 5 2 co mm device ground pin. 6 3 f ltr by placing a capacitor between this pin and vpos, the corner frequency of the modulation filter is lowered. the on - chip filter is formed with 27 pf||2 k for small input signals. 7 1 vrms output pin. near rail -to - rail voltage output with limited current drive capabilities. expected load >10 k to ground. 8 n/a sref supply reference control pin. to enable supply reference mode, this pin must be connected to vpos; otherwise, it should be connected to comm (ground). vpos 1 iref 2 rfin 3 pwdn 4 sref 8 vrms 7 fltr 6 comm 5 ad8361 top view (not to scale) 01088-c-004 vrms 1 comm 2 fltr 3 vpos 6 rfin 5 pwdn 4 ad8361 top view (not to scale) 01088-c-005
ad8361 data sheet rev. f | page 6 of 22 typical performance characteristics figure 6 . output vs. input level, frequencies 100 mhz, 900 mhz, 1900 mhz, and 2500 mhz, supply 2.7 v, ground reference mode, msop figure 7 . output vs. input level, supply 2.7 v, 3.0 v, 5.0 v, and 5.5 v, frequency 900 mhz figure 8 . output vs. input level with different waveforms sine wave (cw), is95 reverse link, w - cdma 4 - channel and w - cdma 15 - channel, supply 5.0 v figure 9 . error from linear reference vs. input level, 3 sigma to either side of mean, sine wave, supply 3.0 v, frequency 900 mhz figure 10 . error from linear reference vs. input level, 3 sigma to either side of mean, sine wave, supply 5.0 v, frequency 900 mhz figure 11 . error from cw linear reference vs. input with different waveforms sine wave (cw), is95 reverse link, w - cdma 4 - channel and w - cdma 15 - channel, supply 3.0 v, frequency 900 mhz input (v rms) 2.8 2.6 0.8 0 0.5 0.1 0.2 0.3 0.4 2.0 1.4 1.2 1.0 2.4 2.2 1.6 1.8 output (v) 0.6 0.4 0.2 0.0 900mhz 100mhz 1900mhz 2.5ghz 01088-c-006 input (v rms) 5.5 1.5 0 0.5 0.1 0.2 0.3 0.4 4.0 3.0 2.5 2.0 5.0 4.5 3.5 output (v) 1.0 0.5 0.0 5.5v 5.0v 3.0v 2.7v 0.6 0.7 0.8 01088-c-007 input (v rms) 5.0 1.5 0 0.5 0.1 0.2 0.3 0.4 4.0 3.0 2.5 2.0 4.5 3.5 output (v) 1.0 0.5 0.0 0.6 0.7 0.8 cw is95 reverse link wcdma 4- and 15-channel 01088-c-008 input (v rms) 3.0 2.5 ? 1.0 0.4 (+5dbm) 0.01 1.5 0 ? 0.5 2.0 0.5 1.0 error (db) ? 1.5 ? 2.0 ? 2.5 ? 3.0 0.1 ( ? 7dbm) 0.02 ( ? 21dbm) mean 3 sigma 01088-c-009 input (v rms) 3.0 2.5 ? 1.0 0.6 (+8.6dbm) 0.01 1.5 0 ? 0.5 2.0 0.5 1.0 error (db) ? 1.5 ? 2.0 ? 2.5 ? 3.0 0.1 0.02 mean 3 sigma ( ? 7dbm) ( ? 21dbm) 01088-c-010 input (v rms) 3.0 2.5 ? 1.0 1.0 0.01 0.1 1.5 0.0 ? 0.5 2.0 0.5 1.0 error (db) ? 1.5 ? 2.0 ? 2.5 ? 3.0 0.02 0.6 0.2 is95 reverse link cw 15-channel 4-channel 01088-c-011
data sheet ad8361 rev. f | page 7 of 22 figure 12. error from cw linear reference vs. input, 3 sigma to either side of mean, is95 reverse link signal, supply 3.0 v, frequency 900 mhz figure 13. error from cw linear reference vs. input level, 3 sigma to either side of mean, is95 reverse link signal, supply 5.0 v, frequency 900 mhz figure 14. output delta from +25c vs. input level, 3 sigma to either side of mean sine wave, supply 3.0 v, frequency 900 mhz, temperature ?40c to +85c figure 15. output delta from +25c vs. input leve l, 3 sigma to either side of mean sine wave, supply 3.0 v, frequency 1900 mhz, temperature ?40c to +85c figure 16. supply current vs. input level, supplies 3.0 v, and 5.0 v, temperatures ?40c, +25c, and +85c figure 17. input impedance vs . frequency, supply 3 v, temperatures ?40c, +25c, and +85c, msop (see the application information section for sot-23 data) 3.0 2.5 ?1.0 0.4 (+5dbm) 0.01 1.5 0 ?0.5 2.0 0.5 1.0 error (db) ?1.5 ?2.0 2.5 ?3.0 0.1 0.02 mean ? 3 sigma input (v rms) (?7dbm) (?21dbm) 01088-c-012 input (v rms) 3.0 2.5 ?1.0 0.6 (+8.6dbm) 0.01 1.5 0 ?0.5 2.0 0.5 1.0 error (db) ?1.5 ?2.0 ?2.5 ?3.0 0.1 0.02 mean ? 3 sigma (?7dbm) (?21dbm) 01088-c-013 input (v rms) 3.0 2.5 ?1.0 0.4 (+5dbm) 0.01 1.5 0 ?0.5 2.0 0.5 1.0 error (db) ?1.5 ?2.0 ?2.5 ?3.0 0.1 0.02 ?40c +85c (?7dbm) (?21dbm) 01088-c-014 input (v rms) 3.0 2.5 ?1.0 0.4 (+5dbm) 0.01 1.5 0 ?0.5 2.0 0.5 1.0 error (db) ?1.5 ?2.0 ?2.5 ?3.0 0.1 0.02 (?7dbm) (?21dbm) ?40c +85c 01088-c-015 input (v rms) 11 3 0 0.5 0.1 0.2 0.3 0.4 8 6 5 4 10 9 7 supply current (ma) 2 1 0 0.6 0.7 0.8 +85c ?40c +25c v s = 5v input out of range +25c +85c ?40c v s = 3v input out of range 01088-c-016 frequency (mhz) 0 500 1000 250 200 150 shunt resistance ( ? ) 100 50 0 2000 2500 1.4 1.2 1.0 shunt capacitance (pf) 0.8 0.6 0.4 1500 +85c +25c ?40c +85c +25c ?40c 1.6 1.8 01088-c-017
ad8361 data sheet rev. f | page 8 of 22 figure 18 . output reference change vs. temperature, supply 3 v, ground reference mode figure 19 . output reference change vs. temperature, supply 3 v, internal reference mode (msop only) figure 20 . output reference change vs. temperature, supply 3 v, supply reference mode (msop only) figure 21 . conversion gain change vs. temperature, supply 3 v, ground reference mode, frequency 900 mhz figure 22 . conversion gain change vs. temperature, supply 3 v, internal reference mode, frequency 900 mhz (msop only) figure 23 . conversion gain change vs. temperature, supply 3 v, supply reference mode, frequency 900 mhz (msop only) temperature ( c) ? 0.02 40 ? 40 ? 20 0 2 0 0.03 0.01 0.00 ? 0.01 0.02 intercept change (v) ? 0.03 ? 0.04 ? 0.05 60 80 100 mean 3 sigma 01088-c-018 temperature (c) ?0.01 40 ?40 ?20 0 20 0.02 0.01 0.00 intercept change (v) ?0.02 ?0.03 60 80 100 mean 3 sigma 01088-c-019 temperature ( c) ? 0.02 40 ? 40 ? 20 0 2 0 0.03 0.01 0.00 ? 0.01 0.02 intercept change (v) ? 0.03 ? 0.04 ? 0.05 60 80 100 mean 3 sigma 01088-c-020 temperature ( c) 0.02 40 ? 40 ? 20 0 2 0 0.12 0.08 0.06 0.04 0.10 gain change (v/v rms) 0.00 ? 0.02 ? 0.04 60 80 100 mean 3 sigma ? 0.06 0.14 0.16 0.18 01088-c-021 temperature ( c) 0.02 40 ? 40 ? 20 0 2 0 0.12 0.08 0.06 0.04 0.10 gain change (v/v rms) 0.00 ? 0.02 ? 0.04 60 80 100 mean 3 sigma ? 0.06 0.14 0.16 0.18 01088-c-022 temperature ( c) 0.02 40 ? 40 ? 20 0 2 0 0.12 0.08 0.06 0.04 0.10 gain change (v/v rms) 0.00 ? 0.02 ? 0.04 60 80 100 mean 3 sigma ? 0.06 0.14 0.16 0.18 01088-c-023
data sheet ad8361 rev. f | page 9 of 22 figure 24 . output response to modulated pulse input for various rf input levels, supp ly 3 v, modulation frequency 900 mhz, no filter capacitor figure 25 . output response to modulated pulse input for various rf input levels, supply 3 v, modulation frequency 900 mhz, 0.01 f filter capacitor figure 26 . hardware configuration for output response to modulated pulse input figure 27 . output response using power - down mode for various rf input levels, supply 3 v, frequency 900 mhz, no filter capacitor figure 28 . output response using power - down mode for various rf input levels, supply 3 v, frequency 900 mhz, 0.01 f filter capacitor figure 29 . hardware configuration for output response using power - down mode 67mv 370mv 270mv 25mv 5 s per horizontal division gate pulse for 900mhz rf tone rf input 500mv per vertical division 01088-c-024 67mv 370mv 25mv 500mv per vertical division 50 s per horizontal division rf input g a t e p u l s e f o r 9 0 0 m h z r f t o n e 270mv 01088-c-025 r1 75? 0.1f hpe3631a power supply c4 0.01f c2 100pf hp8648b signal generator c1 c3 tek tds784c scope c5 100pf tek p6204 fet probe 1 2 3 4 8 7 6 5 ad8361 vpos iref rfin pwdn sref vrms fltr comm 01088-c-026 rf input 67mv 370mv 270mv 25mv 500mv per vertical division pwdn input 2 s per horizontal division 01088-c-027 67mv 370mv 270mv 25mv 500mv per vertical division pwdn input rf input 01088-c-028 20 s per horizontal division r1 75 ? 0.1 f hpe3631a power supply c4 0.01f c2 100pf hp8648b signal generator hp8110a signal generator c1 c3 tek tds784c scope c5 100pf tek p6204 fet probe 1 2 3 4 8 7 6 5 ad8361 vpos iref rfin pwdn sref vrms fltr comm 01088-c-029
ad8361 data sheet rev. f | page 10 of 22 figure 30 . conversion gain change vs. frequency, supply 3 v, ground reference mode, frequency 100 mhz to 2500 mhz, representative device figure 31 . output response to gating o n power supply, for various rf input levels, supply 3 v, modulation frequency 900 mhz, 0.01 f filter capacitor figure 32 . hardware configuration for output response to power supply gating measurements figure 33 . conversion gain distribution frequency 100 mhz, supply 5 v, sample size 3000 figure 34 . output reference, internal reference mode, supply 5 v, sample size 3000 (msop only) figure 35 . output reference, supply reference mode, supply 5 v, sample size 3000 (msop only) carrier frequency (mhz) 7.8 7.6 6.2 100 1000 7.2 6.6 6.4 7.4 6.8 7.0 conversion gain (v/v rms) 6.0 5.8 5.6 v s = 3v 01088-c-030 67mv 370mv 270mv 25mv 500mv per vertical division supply 20 s per horizontal division rf input 01088-c-031 r1 75 ? 732 ? 50 ? 0.1 f c4 0.01 f c2 100pf hp8648b signal generator c1 c3 tek tds784c scope c5 100pf tek p6204 fet probe 1 2 3 4 8 7 6 5 ad8361 vpos iref rfin pwdn sref vrms fltr comm 01088-c-032 hp8110a pulse generator ad811 conversion gain (v/v rms) 7.6 6.9 7.0 7.2 16 percent 7.4 7.8 14 12 10 8 6 4 2 0 01088-c-033 iref mode intercept (v) 0.40 0.32 0.34 0.36 percent 0.38 0.44 12 10 8 6 4 2 0 0.42 01088-c-034 sref mode intercept (v) 0.72 0.64 0.66 0.68 percent 0.70 0.76 12 10 8 6 4 2 0 0.74 01088-c-035
data sheet ad8361 rev. f | page 11 of 22 circuit description the ad8361 is an rms-responding (mean power) detector that provides an approach to the exact measurement of rf power that is basically independent of waveform. it achieves this function through the use of a proprietary technique in which the outputs of two identical squaring cells are balanced by the action of a high-gain error amplifier. the signal to be measured is applied to the input of the first squaring cell, which presents a nominal (lf) resistance of 225 between the rfin and comm pins (connected to the ground plane). because the input pin is at a bias voltage of about 0.8 v above ground, a coupling capacitor is required. by making this an external component, the measurement range may be extended to arbitrarily low frequencies. the ad8361 responds to the voltage, v in , at its input by squaring this voltage to generate a current proportional to v in squared. this is applied to an internal load resistor, across which a capacitor is connected. these form a low-pass filter, which extracts the mean of v in squared. although essentially voltage-responding, the associated input impedance calibrates this port in terms of equivalent power. therefore, 1 mw corresponds to a voltage input of 447 mv rms. the application information section shows how to match this input to 50 . the voltage across the low-pass filter, whose frequency may be arbitrarily low, is applied to one input of an error-sensing amplifier. a second identical voltage-squaring cell is used to close a negative feedback loop around this error amplifier. this second cell is driven by a fraction of the quasi-dc output voltage of the ad8361 . when the voltage at the input of the second squaring cell is equal to the rms value of v in , the loop is in a stable state, and the output then represents the rms value of the input. the feedback ratio is nominally 0.133, making the rms-dc conversion gain 7.5, that is rmsv v in out ?? 5.7 by completing the feedback path through a second squaring cell, identical to the one receiving the signal to be measured, several benefits arise. first, scaling effects in these cells cancel; thus, the overall calibration may be accurate, even though the open-loop response of the squaring cells taken separately need not be. note that in implementing rms-dc conversion, no reference voltage enters into the closed-loop scaling. second, the tracking in the responses of the dual cells remains very close over temperature, leading to excellent stability of calibration. the squaring cells have very wide bandwidth with an intrinsic response from dc to microwave. however, the dynamic range of such a system is fairly small, due in part to the much larger dynamic range at the output of the squaring cells. there are practical limitations to the accuracy of sensing very small error signals at the bottom end of the dynamic range, arising from small random offsets that limit the attainable accuracy at small inputs. on the other hand, the squaring cells in the ad8361 have a class-ab aspect; the peak input is not limited by their quiescent bias condition but is determined mainly by the eventual loss of square-law conformance. consequently, the top end of their response range occurs at a fairly large input level (approximately 700 mv rms) while preserving a reasonably accurate square-law response. the maximum usable range is, in practice, limited by the output swing. the rail-to-rail output stage can swing from a few millivolts above ground to less than 100 mv below the supply. an example of the output induced limit: given a gain of 7.5 and assuming a maximum output of 2.9 v with a 3 v supply, the maximum input is (2.9 v rms)/7.5 or 390 mv rms. filtering an important aspect of rms-dc conversion is the need for averaging (the function is root-mean-square ). for complex rf waveforms, such as those that occur in cdma, the filtering provided by the on-chip, low-pass filter, although satisfactory for cw signals above 100 mhz, is inadequate when the signal has modulation components that extend down into the kilohertz region. for this reason, the fltr pin is provided: a capacitor attached between this pin and vpos can extend the averaging time to very low frequencies. offset an offset voltage can be added to the output (when using the msop version) to allow the use of adcs whose range does not extend down to ground. however, accuracy at the low end degrades because of the inherent error in this added voltage. this requires that the iref ( internal reference ) pin be tied to vpos and sref ( supply reference ) to ground. in the iref mode, the intercept is generated by an internal reference cell and is a fixed 350 mv, independent of the supply voltage. to enable this intercept, iref should be open-circuited, and sref should be grounded. in the sref mode, the voltage is provided by the supply. to implement this mode, tie iref to vpos and sref to vpos. the offset is then proportional to the supply voltage and is 400 mv for a 3 v supply and 667 mv for a 5 v supply.
ad8361 data sheet rev. f | page 12 of 22 application information basic connections figure 36 through figure 38 show the basic connections for the ad8361 s msop version in its three operating modes. in all modes, the device is powered by a single supply of between 2.7 v and 5.5 v. the vpos pin is decoupled using 100 pf and 0.01 f capacitors. the quiescent current of 1.1 ma in operating mode can be reduced to 1 a by pulling the pwdn pin up to vpos. a 75 external shunt resistance combines with the ac-coupled input to give an overall broadband input impedance near 50 . note that the coupling capacitor must be placed between the input and the shunt impedance. input impedance and input coupling are discussed in more detail below. the input coupling capacitor combines with the internal input resistance (figure 37) to provide a high-pass corner frequency given by the equation in c rc f ?? ? 2 1 db3 with the 100 pf capacitor shown in figure 36 through figure 38, the high-pass corner frequency is about 8 mhz. figure 36. basic connections for ground reference mode figure 37. basic connections for internal reference mode figure 38. basic connections for supply referenced mode the output voltage is nominally 7.5 times the input rms voltage (a conversion gain of 7.5 v/v rms). three modes of operation are set by the sref and iref pins. in addition to the ground reference mode shown in figure 36, where the output voltage swings from around near ground to 4.9 v on a 5.0 v supply, two additional modes allow an offset voltage to be added to the output. in the internal reference mode (figure 37), the output voltage swing is shifted upward by an internal reference voltage of 350 mv. in supply referenced mode (figure 38), an offset voltage of v s /7.5 is added to the output voltage. table 4 summarizes the connections, output transfer function, and minimum output voltage (i.e., zero signal) for each mode. output swing figure 39 shows the output swing of the ad8361 for a 5 v supply voltage for each of the three modes. it is clear from figure 39 that operating the device in either internal reference mode or supply referenced mode reduces the effective dynamic range as the output headroom decreases. the response for lower supply voltages is similar (in the supply referenced mode, the offset is smaller), but the dynamic range reduces further as headroom decreases. figure 40 shows the response of the ad8361 to a cw input for various supply voltages. figure 39. output swing for ground, internal, and supply referenced mode, vpos = 5 v (msop only) 1 2 3 4 8 7 6 5 ad8361 vpos iref rfin pwdn sref vrms fltr comm r1 75 ? 0.01 ? f c c 100pf cfltr 100pf +v s 2.7v ? 5.5v rfin v rms 01088-c-036 1 2 3 4 8 7 6 5 ad8361 vpos iref rfin pwdn sref vrms fltr comm r1 75 ? 0.01 ? f c c 100pf cfltr 100pf +v s 2.7v ? 5.5v rfin v rms 01088-c-037 1 2 3 4 8 7 6 5 ad8361 vpos iref rfin pwdn sref vrms fltr comm r1 75 ? 0.01 ? f c c 100pf cfltr 100pf +v s 2.7v ? 5.5v rfin v rms 01088-c-038 input (v rms) 5.0 4.5 0.0 0 0.5 0.1 0.2 0.3 0.4 3.0 1.5 1.0 0.5 4.0 3.5 2.0 2.5 output (v) supply ref internal ref ground ref 0.6 0.7 0.8 01088-c-039
data sheet ad8361 rev. f | page 13 of 22 figure 40 . output swing for supply voltages of 2.7 v, 3.0 v, 5.0 v and 5.5 v (msop only) dynamic range because the ad8361 is a linear - responding device with a nominal transfer function of 7.5 v/v rms, the dynamic range in db is not clear from plots such as figure 39 . as the input level is increased in constant db steps, the output step size (per db) also increases. figure 41 shows the relati onship between the output step size (i.e., mv/db) and input voltage for a nominal transfer function of 7.5 v/v rms. table 4 . connections and nominal transfer function for ground, internal, and supply reference modes reference mode iref sref output intercept (no signal) output ground vpos comm zero 7.5 v in internal open comm 0.350 v 7.5 v in + 0.350 v supply vpos vpos v s /7.5 7.5 v in + v s /7.5 figure 41 . idealized output step size as a function of input voltage plots of output voltage versus input voltage result in a straight line. it may sometimes be more useful to plot the error on a logarithmic scale, as shown in figure 42 . the deviation of the plot for the ideal straight line characteristic is caused by output clipping at the high end and by signal offsets at the low end. it should however be noted that offsets at the low end can be either positive or negative , so this plot could also trend upwards at the low end. figure 9 , figure 10, figure 12 , and figure 13 show a 3 sigma distribution of the device error for a large population of devices. figure 42 . representative unit, error in db vs. input level, v s = 2.7 v it is als o apparent in figure 42 that the error plot tends to shift to the right with increasing frequency. because the input impedance decreases with frequency, the voltage act ually applied to the input also tends to decrease (assuming a constant source impedance over frequency). the dynamic range is almost constant over frequency, but with a small decrease in conversion gain at high frequency. input coupling and matching the in put impedance of the ad8361 decreases with increasing frequency in both its resistive and capacitive components ( figure 17 ). the resistive component varies from 225 ? at 100 mhz down to about 95 ? at 2.5 ghz. a number of options exist for input matching. for operation at multiple frequencies, a 75 ? shunt to ground, as shown in figure 43 , provides the best overall match. for use at a single frequency, a resistive or a reactive match can be used. by plotting the input impedance on a smith chart, the best value for a resistive m atch can be calculated. the vswr can be held below 1.5 at frequencies up to 1 ghz, even as the input impedance varies from part to part. (both input impedance and input capacitance can vary by up to 20% around their nominal values.) at very high frequenci es (i.e., 1.8 ghz to 2.5 ghz), a shunt resistor is not sufficient to reduce the vswr below 1.5. where vswr is critical, remove the shunt component and insert an inductor in series with the coupling capacitor as shown in figure 44. table 5 gives recommended shunt resistor values for various frequencies and series inductor values for high frequencies. the coupling capacitor, c c , essentially acts as an ac - short and plays no intent ional part in the matching. input (v rms) 5.5 1.5 0 0.5 0.1 0.2 0.3 0.4 4.0 3.0 2.5 2.0 5.0 4.5 3.5 output (v) 1.0 0.5 0.0 5.5v 5.0v 3.0v 2.7v 0.6 0.7 0.8 01088-c-040 input (mv) 700 200 0 500 100 200 300 400 500 400 300 600 mv/db 100 0 600 700 800 01088-c-041 input (v rms) 2.0 ? 0.5 0.01 0.5 0.0 1.5 1.0 error (db) ? 1.0 ? 1.5 ? 2.0 1.0 1.9ghz 2.5ghz 900mhz 100mhz 100mhz 0.02 ( ? 21dbm) 0.1 ( ? 7dbm) 0.4 (+5dbm) 01088-c-042
ad8361 data sheet rev. f | page 14 of 22 figure 43. input coupling/matching options, broadband resistor match figure 44. input coupling/matching options, series inductor match figure 45. input coupling/matching op tions, narrowband reactive match figure 46. input coupling/matching op tions, attenuating the input signal table 5. recommended component values for resistive or inductive input matching (figure 43 and figure 44) frequency matching component 100 mhz 63.4 shunt 800 mhz 75 shunt 900 mhz 75 shunt 1800 mhz 150 shunt or 4.7 nh series 1900 mhz 150 shunt or 4.7 nh series 2500 mhz 150 shunt or 2.7 nh series alternatively, a reactive match can be implemented using a shunt inductor to ground and a series capacitor, as shown in figure 45. a method for hand calculating the appropriate matching components is shown on page 12 of the ad8306 data sheet. matching in this manner results in very small values for c m , especially at high frequencies. as a result, a stray capacitance as small as 1 pf can significantly degrade the quality of the match. the main advantage of a reactive match is the increase in sensitivity that results from the input voltage being gained up (by the square root of the impedance ratio) by the matching network. table 6 shows the recommended values for reactive matching. table 6. recommended values for a reactive input matching (figure 45) frequency (mhz) c m (pf) l m (nh) 100 16 180 800 2 15 900 2 12 1800 1.5 4.7 1900 1.5 4.7 2500 1.5 3.3 input coupling using a series resistor figure 46 shows a technique for coupling the input signal into the ad8361 that may be applicable where the input signal is much larger than the input range of the ad8361 . a series resistor combines with the input impedance of the ad8361 to attenuate the input signal. because this series resistor forms a divider with the frequency dependent input impedance, the apparent gain changes greatly with frequency. however, this method has the advantage of very little power being tapped off in rf power transmission applications. if the resistor is large compared to the transmission lines impedance, then the vswr of the system is relatively unaffected. figure 47. input impedance vs. frequency, supply 3 v, sot-23 selecting the filter capacitor the ad8361 s internal 27 pf filter capacitor is connected in parallel with an internal resistance that varies with signal level from 2 k for small signals to 500 for large signals. the resulting low-pass corner frequency between 3 mhz and 12 mhz provides adequate filtering for all frequencies above 240 mhz (i.e., 10 times the frequency at the output of the squarer, which is twice the input frequency). however, signals with high peak-to-average ratios, such as cdma or w-cdma signals, and low frequency components require additional filtering. tdma signals, such as gsm, pdc, or phs, have a peak-to average ratio that is close to that of a sinusoid, and the internal filter is adequate. ad8361 rfin rfin r sh 01088-c-043 c c ad8361 rfin rfin l m 01088-c-044 c c ad8361 rfin rfin 01088-c-045 c c c m l m ad8361 rfin rfin 01088-c-046 c c r series frequency (mhz) 200 0 500 resistance ( ? ) 100 0 250 150 50 1000 1500 2000 2500 3000 3500 0.2 0.5 0.8 1.1 1.4 1.7 capacitance (pf) 01088-c-047
data sheet ad8361 rev. f | page 15 of 22 the filter capacitance of the ad8361 can be augmented by connecting a capacitor between pin 6 (fltr) and vpos. table 7 shows the effect of several capacitor values for various communications standards with high peak-to-average ratios along with the residual ripple at the output, in peak-to-peak and rms volts. note that large filter capacitors increase the enable and pulse response times, as discussed below. table 7. effect of waveform and cfilt on residual ac output residual ac waveform c filt v dc mv p-p mv rms is95 reverse link open 0.5 550 100 1.0 1000 180 2.0 2000 360 0.01 f 0.5 40 6 1.0 160 20 2.0 430 60 0.1 f 0.5 20 3 1.0 40 6 2.0 110 18 is95 8-channel 0.01 f 0.5 290 40 forward link 1.0 975 150 2.0 2600 430 0.1 f 0.5 50 7 1.0 190 30 2.0 670 95 w-cdma 15 0.01 f 0.5 225 35 channel 1.0 940 135 2.0 2500 390 0.1 f 0.5 45 6 1.0 165 25 2.0 550 80 operation at low frequencies although the ad8361 is specified for operation up to 2.5 ghz, there is no lower limit on the operating frequency. it is only necessary to increase the input coupling capacitor to reduce the corner frequency of the input high-pass filter (use an input resistance of 225 for frequencies below 100 mhz). it is also necessary to increase the filter capacitor so that the signal at the output of the squaring circuit is free of ripple. the corner frequency is set by the combination of the internal resistance of 2 k and the external filter capacitance. power consumption, enable and power-on the quiescent current consumption of the ad8361 varies with the size of the input signal from about 1 ma for no signal up to 7 ma at an input level of 0.66 v rms (9.4 dbm, re 50 ). if the input is driven beyond this point, the supply current increases steeply (see figure 16). there is little variation in quiescent current with power supply voltage. the ad8361 can be disabled either by pulling the pwdn (pin 4) to vpos or by simply turning off the power to the device. while turning off the device obviously eliminates the current consumption, disabling the device reduces the leakage current to less than 1 a. figure 27 and figure 28 show the response of the output of the ad8361 to a pulse on the pwdn pin, with no capacitance and with a filter capacitance of 0.01 f, respectively; the turn-on time is a function of the filter capacitor. figure 31 shows a plot of the output response to the supply being turned on (i.e., pwdn is grounded and vpos is pulsed) with a filter capacitor of 0.01 f. again, the turn-on time is strongly influenced by the size of the filter capacitor. if the input of the ad8361 is driven while the device is disabled (pwdn = vpos), the leakage current of less than 1 a increases as a function of input level. when the device is disabled, the output impedance increases to approximately 16 k. volts to dbm conversion in many of the plots, the horizont al axis is scaled in both rms volts and dbm. in all cases, dbm are calculated relative to an impedance of 50 . to convert between dbm and volts in a 50 system, the following equations can be used. figure 48 shows this conversion in graphical form. ?? ?? ?? ?? 2 2 2010log w0.001 50 10log dbm rmsv rmsv power ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?? 20 /10 log 10 log50w0.001 1 1 dbm dbm rmsv ? ? ? ? ? ? ? ? ? ?? ? figure 48. conversion from dbm to rms volts v rms dbm +20 +10 0 ?10 ?20 ?30 ?40 1 0.1 0.01 0.001 01088-c-048
ad8361 data sheet rev. f | page 16 of 22 output drive capability and buffering the ad8361 is capable of sourcing an output current of approximately 3 ma. if additional current is required, a simple buffering circuit can be used as shown in figure 51 . similar circuits can be used to increase or decrease the nominal conver sion gain of 7.5 v/v rms ( figure 49 and figure 50 ). in figure 50 , the ad8031 buffers a resistive divider to give a slope of 3.75 v/v rms. in figure 49 , the op amps gain of two increases the slope to 15 v/v rms. using other resistor values, the slope can be changed to an arbitrary value. the ad8031 rail - to - rail op amp, used in t hese example, can swing from 50 mv to 4.95 v on a single 5 v supply and operate at supply voltages down to 2.7 v. if high output current is required (>10 ma), the ad8051 , which also has rail - to - rail capability, can be used down to a supply voltage of 3 v. it can deliver up to 45 ma of output current. figure 49 . output buffering options, slope of 15 v/v rms figure 50 . output buffering options, slope of 3.75 v/v rms figure 51 . output buffering options, slope of 7.5 v/v rms output reference tem perature drift compensation the error due to low temperature drift of the ad8361 can be reduced if the temperature is known. many systems incorporate a temperature sensor; the output of the sensor is typically di giti zed, facilitating a software correction. using this informa tion, only a two - point calibration at ambient is required. the output voltage of the ad8361 at ambient (25c) can be expressed by the equation ( ) ? ? + = in out v gain v were gain is the conversion gain in v/v rms and v os is the extrapolated output voltage for an input l evel of 0 v. gain and v os (also referred to as intercept and output reference) can be calculated at ambient using a simple two - point calibration by measuring the output voltages for two specific input levels. calibration at roughly 35 mv rms ( ? 16 dbm) and 250 mv rms (+1 dbm) is recommended for maximum linear dynamic range. however, alternative levels and ranges can be chosen to suit the application. gain and v os are then calculated using the equations ( ) in1 in2 out1 out2 v v v v gain ? ? = ( ) in1 out1 os v gain v v ? = gain and v os drift over temperature. however, the drift of v os has a bigger influence on the error relative to the output. this can be seen by inserting data from figure 18 and figure 21 (intercept drift and conversion gain) into the equation for v out . these plots are consistent with figure 14 and figure 15, which show that the error due to temperature drift decreases with increasing input level. this results from the offset error having a diminishing influence with increasing level on the overall measurement error. from f igure 18 , the average intercept drift is 0.43 mv/c from ?40c to +25c and 0.17 mv/c from +25c to +85c. for a less rigorous compensation scheme, the average drift over the complete temp erature range can be calculated as ( ) ( ) ( ) = ? ? ? ? ? ? ? ? ? ? + ? ? = vos drift it te drift of v os included, the equation for v out becomes v out = ( gain v in ) + v os + drift vos ( temp ? 25c) 100pf 0.01 f 0.01 f ad8361 vout vpos comm pwdn 5k ? 5k ? 5v 15v/v rms ad8031 01088-c-049 100pf 0.01 f 0.01 f ad8361 vout vpos comm pwdn 5v 3.75v/v rms ad8031 5k ? 5k ? 10k ? 01088-c-050 100pf 0.01 f 0.01 f ad8361 vout vpos comm pwdn 5v 7.5v/v rms ad8031 01088-c-051
data sheet ad8361 rev. f | page 17 of 22 the equation can be rewritten to yield a temperature compensated value for v in : ( ) ( ) gain temp drift v v v vos os out in c 25 ? ? ? = figure 52 . typical output voltage and error vs. input level, 800 mhz, vpos = 5 v figure 53 . error after temperature compensation of output reference,800 mhz, v pos = 5 v extended frequency characterization although the ad8361 was originally intended as a power measurement and control device for cellular wireless applications, the ad8361 has useful performance at higher frequencies. typical applications may include mmds, lmds, wlan, and other noncellular activities. in orde r to characte rize the ad8361 at frequencies greater than 2.5 ghz, a small collection of d evices were tested. dynamic range, conversion gain, and output intercept were measured at several frequencies over a temperature range of ?30c to +80c. both cw and 64 qam modulated input wave forms were used in the characterization process in order to ac cess varying peak - to - average waveform performance. the dynamic range of the device is calculated as the input power range over which the device remains within a permissible error margin to the ideal transfer function. devices were tested over frequency and temperature. after identifying an acceptable error margin for a given application, the usable dynamic measurement range can be identified using the plots in figure 54 through figure 57 . for instance, for a 1 db error margin and a modulated carrier at 3 ghz, the usable dynamic range can be found by insp ectin g the 3 ghz plot of figure 57. note that the ?30c curve crosses the ?1 db error limit at ?17 dbm . f or a 5 v supply , the maximum input power should not exceed 6 dbm in order to avoid compression. the resultant usable dynam ic range is therefore 6 dbm ? (?17 dbm) or 23 dbm over a temperature range of ?30c to +80c. figure 54 . transfer function and error plots measured at 1.5 ghz for a 64 qam modulated signal pin (dbm) 2.5 ? 25 0 ? 20 ? 15 ? 10 ? 5 1.0 2.0 1.5 0.5 error (db) 5 10 +25 c ? 40 c 0 ? 0.5 ? 1.0 ? 1.5 ? 2.0 ? 2.5 0.1 10 1.0 v out (v) +85 c 01088-c-052 pin (dbm) ? 25 0 ? 20 ? 15 ? 10 ? 5 1.0 2.0 1.5 0.5 error (db) 5 10 0 ? 0.5 ? 1.0 ? 1.5 ? 2.0 ? 2.5 +25 c ? 40 c +85 c ? 3.0 ? 30 01088-c-053 pin (dbm) 2.5 ?25 error (db) 2.0 1.5 1.0 0.5 0 ?0.5 ?1.0 ?1.5 ?2.0 ?2.5 ?20 ?15 ?10 ?5 0 5 10 10 1 0.1 v out (v) +80c +25c ?30c 01088-0-054
ad8361 data sheet rev. f | page 18 of 22 figure 55 . transfer function and error plots measured at 2.5 ghz for a 64 qam modulated signal figure 56 . transfer function and error plots measured at 2.7 ghz for a 64 qam modulated signal figure 57 . transfer function and error plots measured at 3.0 ghz for a 64 qam modulated signal figure 58 . error from cw linear reference vs. input drive level for cw and 64 qam modulated signals at 3.0 ghz figure 59 . con version gain vs. frequency for a typical device, supply 3 v, ground reference mode the transfer functions and error for a cw input and a 64 qam input waveform is shown in figure 58 . the error curve is generated from a linear reference based on the cw data. the increased crest factor of the 64 qam modulation results in a decrease in output from the ad8361 . this decrease in output is a result of the limited bandwidth and compression of the interna l gain stages. this inaccuracy should be accounted for in systems where varying crest factor signals need to be measured. the conversion gain is defined as the s lope of the output voltage v s. the input rms voltage. an ideal best fit curve can be found for the measured transfer function at a given supply voltage and temperature. the slope of the ideal curve is identified as the conversion gain for a particular device. the conversion gain relates the measurement sensitivity of the ad8361 to the rms input voltage of the rf waveform. the conversion gain was measured for a number of dev ices over a temperature range of ?30c to +80c. the conversion gain for a typical device is shown in figure 59. although the conversion gain tends to decrease with increasing frequency, the ad8361 provide s measurement capability at frequencies greater than 2.5 ghz. however, it is necessary to calibrate for a given application to accommodate for the change in conversion gain at higher frequencies. pin (dbm) 2.5 ? 25 error (db) 2.0 1.5 1.0 0.5 0 ? 0.5 ? 1.0 ? 1.5 ? 2.0 ? 2.5 ? 20 ? 15 ? 10 ? 5 0 5 10 10 1 0.1 v out (v) +80 c +25 c ? 30 c 01088-c-055 pin (dbm) 2.5 ? 25 error (db) 2.0 1.5 1.0 0.5 0 ? 0.5 ? 1.0 ? 1.5 ? 2.0 ? 2.5 ? 20 ? 15 ? 10 ? 5 0 5 1 0 10 1 0.1 v out (v) +80 c +25 c ? 30 c 01088-c-056 pin (dbm) 2.5 ? 25 error (db) 2.0 1.5 1.0 0.5 0 ? 0.5 ? 1.0 ? 1.5 ? 2.0 ? 2.5 ? 20 ? 15 ? 10 ? 5 5 0 1 0 10 1 0.1 v out (v) +80 c +25 c ? 30 c 01088-c-057 pin (dbm) 2.5 ?25 error (db) 2.0 1.5 1.0 0.5 0 ?0.5 ?1.0 ?1.5 ?2.0 ?2.5 ?20 ?15 ?10 ?5 5 0 10 10 1 0.1 v out (v) cw 64 qam 01088-c-058 frequency (mhz) 8.0 100 conversion gain (v/v rms) 7.5 7.0 6.5 6.0 5.5 5.0 200 400 800 1200 1600 2200 2500 2700 3000 01088-c-059
data sheet ad8361 rev. f | page 19 of 22 evalua tion board figure 60 and figure 63 show the schematic of the ad8361 evaluation board. note that uninstalled components are drawn in as dashed. the layout and silkscreen of the component side are shown in figure 61, figure 62, figure 64 , and figure 65 . the board is powered by a single supply in the 2.7 v to 5.5 v range. the power supply is decoupled by 100 pf and 0.01 f capacitors. additional decoupling, in the form of a series resistor or inductor in r6, can also be added . table 8 details the various configuration options of the evaluation board. table 8 . evaluation board configuration options comp onent function default condition tp1, tp2 ground and supply vector pins. not applicable sw1 device enable. when in position a, the pwdn pin is connected to +v s and the ad8361 is in power - down mode. in position b, the pwdn pin is grounded, putting the device in operating mode. sw1 = b sw2/sw3 operating mode. selects either ground reference mode, internal reference mode or supply reference mode. see table 4 for more details. sw 2 = a, sw 3 = b (ground reference mode) c1, r2 input coupling. the 75 resistor in position r2 combines with the ad8361 s internal input impedance to give a broadband input impedance of around 50 . for more precise matching at a particular frequency, r2 can be replaced by a different value (see input coupling and matching and figure 43 through figure 46). capacitor c1 ac couples the input signal and creates a high - pass input filter whose corner frequency is equal to approximately 8 mhz. c1 can be increased for operation at lower frequencies. if resistive attenuation is desired at the input, series resistor r1, which is nominally 0 , can be replaced by an appropriate value. r 2 = 75 (size 0402 ) c1 = 100 pf (size 0402) c2, c3, r6 power supply de coupling. the nominal supply decoupling of 0.01 f and 100 pf. a series inductor or small resistor can be placed in r6 for additional decoupling. c 2 = 0.01 f (size 0402 ) c 3 = 100 pf (size 0402 ) r6 = 0 (size 0402) c5 filter capacitor. the internal 50 p f averaging capacitor can be augmented by placing a capacitance in c5. c5 = 1 nf (size 0603) c4, r5 output loading. resistors and capacitors can be placed in c4 and r5 to load test v rms. c4 = r5 = open (size 0603)
ad8361 data sheet rev. f | page 20 of 22 figure 60 . evaluation board schematic , msop figure 61 . layout of component side , msop figure 62 . silkscreen of component side , msop figure 63 . evaluation board schematic, sot - 23 figure 64 . layout of the component side, sot - 23 figure 65 . silkscreen of the component side, sot - 23 1 2 3 4 8 7 6 5 ad8361 vpos iref rfin pwdn sref vrms fltr comm c2 0.01 f c3 100pf c1 100pf c5 rfin v rms vpos v s sw2 v s sw3 sw1 a b a b 1nf a b tp2 tp1 vpos vpos r2 75 ? r4 0 ? r6 0 ? c4 (open) r5 (open) 01088-c-065 01088-c-066 01088-c-067 r2 75 ? r7 50 ? r4 0 ? c2 0.01 f c1 100pf c3 100pf c5 1nf j2 j3 j1 tp2 c4 (open) r5 (open) ad8361 vpos rfin pwdn vrms fltr comm tp1 sw1 1 2 3 vpos 1 2 3 6 5 4 01088-c-068 01088-c-069 01088-c-070
data sheet ad8361 rev. f | page 21 of 22 problems caused by impedance mismatch may arise using the evaluation board to examine the ad8361 performance. one way to reduce these problems is to put a coaxial 3 db attenuator on the rfin sma connector. mismatches at the source, cable, and cable interconnection, as well as those occurring on the evaluation board, can cause these problems. a simple (and common) example of such a problem is triple travel due to mismatch at both the source and the evaluation board. here the signal from the source reaches the evaluation board and mismatch causes a reflection. when that reflection reaches the source mismatch, it causes a new reflection, which travels back to the evaluation board, adding to the original signal incident at the board. the resultant voltage varies with both cable length and frequency dependence on the relative phase of the initial and reflected signals. placing the 3 db pad at the input of the board improves the match at the board and thus reduces the sensitivity to mismatches at the source. when such precautions are taken, measurements are less sensitive to cable length and other fixture issues. in an actual application when the distance between ad8361 and source is short and well defined, this 3 db attenuator is not needed. characterization setups equipment the primary characterization setup is shown in figure 67. the signal source used was a rohde & schwarz smiq03b, version 3.90hx. the modulated waveforms used for is95 reverse link, is95 nine active channels forward (forward link 18 setting), and w-cdma 4-channel and 15-channel were generated using the default settings coding and filtering. signal levels were calibrated into a 50 impedance. analysis the conversion gain and output reference are derived using the coefficients of a linear regression performed on data collected in its central operating range (35 mv rms to 250 mv rms). this range was chosen to avoid areas of operation where offset distorts the linear response. error is stated in two forms error from linear response to cw waveform and output delta from 2c performance. the error from linear response to cw waveform is the difference in output from the ideal output defined by the conversion gain and output reference. this is a measure of both the linearity of the device response to both cw and modulated waveforms. the error in db uses the conversion gain multiplied by the input as its reference. error from linear response to cw waveform is not a measure of absolute accuracy, since it is calculated using the gain and output reference of each device. however, it does show the linearity and effect of modulation on the device response. error from 25c performance uses the performance of a given device and waveform type as the reference; it is predominantly a measure of output variation with temperature. figure 66. characterization board figure 67. characterization setup 1 2 3 4 8 7 6 5 ad8361 vpos iref rfin pwdn sref vrms fltr comm c1 0.1 ? f r1 75? rfin c3 c4 0.1 ? f c2 100pf iref pwdn vpos sref vrms 01088-c-071 ad8361 characterization board rfin prup +v s sref iref vrms dc output rf signal smiq038b rf source ieee bus pc controller dc matrix / dc supplies / dmm dc sources 3db attenuator 01088-c-072
ad8361 data sheet rev. f | page 22 of 22 outline dimensions figure 68. 8-lead mini small outline package [msop] (rm-8) dimensions shown in millimeters figure 69. 6-lead small outline transistor package [sot-23] (rj-6) dimensions shown in millimeters ordering guide model 1 temperature range package description package option branding ad8361arm ?40c to +85c 8-lead msop, tube rm-8 j3a ad8361arm-reel7 ?40c to +85c 8-lead msop, 7" tape and reel rm-8 j3a ad8361armz ?40c to +85c 8-lead msop, tube rm-8 j3a ad8361armz-reel ?40c to +85c 8-lead msop, 13" tape and reel rm-8 j3a ad8361armz-reel7 ?40c to +85c 8-lead msop, 7" tape and reel rm-8 j3a ad8361artz-rl7 ?40c to +85c 6-lead sot-23, 7" tape and reel rj-6 j3a AD8361-EVALZ evaluation board msop ad8361art-eval evaluati on board sot-23-6l 1 z = rohs compliant part. compliant to jedec standards mo-187-aa 6 0 0.80 0.55 0.40 4 8 1 5 0.65 bsc 0.40 0.25 1.10 max 3.20 3.00 2.80 coplanarity 0.10 0.23 0.09 3.20 3.00 2.80 5.15 4.90 4.65 pin 1 identifier 15 max 0.95 0.85 0.75 0.15 0.05 10-07-2009-b compliant to jedec standards mo-178-ab 10 4 0 seating plane 1.90 bsc 0.95 bsc 0.60 bsc 65 123 4 3.00 2.90 2.80 3.00 2.80 2.60 1.70 1.60 1.50 1.30 1.15 0.90 0 .15 max 0 .05 min 1.45 max 0.95 min 0.20 max 0.08 min 0.50 max 0.30 min 0.55 0.45 0.35 pin 1 indicator 12-16-2008-a ?1999C2015 analog devices, inc. all ri ghts reserved. trademarks and registered trademarks are the prop erty of their respective owners. d01088C0C7/15(f)

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